Renesas Adds Reconfigurable Processor With AI Accelerator to MPU Lineup

Artificial intelligence (AI) power comes from Renesas’ proprietary AI accelerator, the AI3 dynamically reconfigurable processor (DRP). 

High Performance—Low Size, Power Consumption, and Heat
The RZ/V2N (datasheet linked) joins the mid-range of Renesas RZ/V2x MPU lineup with multiple cores and a broad feature set: 
Four Arm Cortex-A55 CPU cores at 1.8 GHz
One Cortex-M33 system management core with on-chip FPU and DSP extensions at 100 MHz
Renesas' AI3 dynamically reconfigurable AI accelerator
Arm Mali-C55 image signal processor
Accelerators:
3D graphics engine (GE3D) (option) 
Image signal processor (ISP) (option) 
Image scaling unit (ISU) 
Video codec unit (VCD)
1.5 MB of on-chip SRAM
Two-channel MIPI camera interface
Extensive I/O set covering all major protocols, including six-channel CAN/CANFD, Ethernet, and USB 3.2

Optimized Design
The high-performance design of the RZ/V2N ensures its small physical size and low power characteristics. It adopts a 15 mm x 15 mm BGA package and can operate without active cooling, making it suitable for applications with strict noise and space constraints.

Dual Camera Support
The RZ/V2N is optimized for stereo vision systems, supporting simultaneous dual-angle image capture from two cameras. This configuration enhances analytical capabilities for applications such as 3D object detection. For example, one camera may be used to count cars in a parking lot, while the other handles license plate recognition.

AI Functionality
The AI capabilities of the RZ/V2N MPU rely on Renesas’ DRP-AI3 dynamically reconfigurable processor, delivering efficient performance of 10 tera operations per watt (TOPS/W), along with an inference performance boost of up to 15 AI TOPS. Intelligent pruning technology further enhances efficiency by eliminating irrelevant data, making AI processing more effective.
AI3 can operate independently of the main CPU. Its DRP core contains 96 AI processing units and one matrix multiply-accumulate (AI-MAC) unit with 2,048 INT8-format elements, featuring an independent DMA controller to accelerate data transfer.

Dynamically Reconfigurable
The MPU’s reconfigurability allows it to optimize for specific computing tasks, offering flexibility similar to that of field-programmable gate arrays (FPGAs). This design improves its ability to execute parallel tasks, enabling outstanding performance across multiple application scenarios.

Support and Availability
As a mid-range product in the Renesas Visual AI MPU series, the RZ/V2N offers a wide performance range and low power consumption options. Renesas provides a complete development stack and multiple reference designs, including a dual-camera AI dashcam solution, to help product designers accelerate evaluation.
This dual-camera solution integrates both hardware and software for real-time vision inference, supporting front-facing advanced driver-assistance systems (ADAS) and driver monitoring systems (DMS), and offers quick wake-up and low-power standby modes to ensure instant event recording.

Currently, the RZ/V2N and the RZ/V2N quad-core vision AI MPU evaluation kits are available through Renesas' standard distribution channels.
For more information, please visit the Renesas Electronics official website or refer to the RZ/V2N microprocessor datasheet.